- AutorIn
- Michel Ludwig Theoretical Computer Science, TU Dresden; Center for Advancing Electronics Dresden
- Rafael PeñalozaTheoretical Computer Science, TU Dresden; Center for Advancing Electronics Dresden
- Titel
- Error-Tolerant Reasoning in the Description Logic EL
- Zitierfähige Url:
- https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-795559
- Schriftenreihe
- LTCS-Report
- Bandnummer
- 14-11
- Erstveröffentlichung
- 2014
- DOI
- https://doi.org/10.25368/2022.209
- Abstract (EN)
- Developing and maintaining ontologies is an expensive and error-prone task. After an error is detected, users may have to wait for a long time before a corrected version of the ontology is available. In the meantime, one might still want to derive meaningful knowledge from the ontology, while avoiding the known errors. We study error-tolerant reasoning tasks in the description logic EL. While these problems are intractable, we propose methods for improving the reasoning times by precompiling information about the known errors and using proof-theoretic techniques for computing justifications. A prototypical implementation shows that our approach is feasible for large ontologies used in practice.
- Freie Schlagwörter (DE)
- Ontologie, EL-Konzept, Beschreibungslogik, Fehler-Anfälligkeit
- Freie Schlagwörter (EN)
- ontology, EL-concept, description logic, error-proneness
- Klassifikation (DDC)
- 004
- Klassifikation (RVK)
- ST 136
- Publizierende Institution
- Technische Universität Dresden, Dresden
- Version / Begutachtungsstatus
- angenommene Version / Postprint / Autorenversion
- URN Qucosa
- urn:nbn:de:bsz:14-qucosa2-795559
- Veröffentlichungsdatum Qucosa
- 20.06.2022
- Dokumenttyp
- Bericht
- Sprache des Dokumentes
- Englisch
- Lizenz / Rechtehinweis
CC BY 4.0