- Titel
- A 16-Channel Fully Configurable Neural SoC With 1.52 μW/Ch Signal Acquisition, 2.79 μW/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI
- Zitierfähige Url:
- https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-899190
- Quellenangabe
- IEEE Transactions on Biomedical Circuits and Systems
Erscheinungsjahr: 2022
Jahrgang: 16
Heft: 1
Seiten: 94-107
ISSN: 1932-4545
E-ISSN: 1940-9990 - Abstract (EN)
- With the advent of high-density micro-electrodes arrays, developing neural probes satisfying the real-time and stringent power-efficiency requirements becomes more challenging. A smart neural probe is an essential device in future neuroscientific research and medical applications. To realize such devices, we present a 22 nm FDSOI SoC with complex on-chip real-time data processing and training for neural signal analysis. It consists of a digitally-assisted 16-channel analog front-end with 1.52 μ W/Ch, dedicated bio-processing accelerators for spike detection and classification with 2.79 μ W/Ch, and a 125 MHz RISC-V CPU, utilizing adaptive body biasing at 0.5 V with a supporting 1.79 TOPS/W MAC array. The proposed SoC shows a proof-of-concept of how to realize a high-level integration of various on-chip accelerators to satisfy the neural probe requirements for modern applications.
- Andere Ausgabe
- Link zum Artikel, der zuerst in der Zeitschrift „IEEE transactions on biomedical circuits and systems” erschienen ist.
DOI: 10.1109/TBCAS.2022.3142987 - Freie Schlagwörter (DE)
- System-on-Chip, Training, Echtzeitsysteme, Direktzugriffsspeicher, Leistungsbedarf, Arrays, Sortierung
- Freie Schlagwörter (EN)
- System-on-chip, Training, Real-time systems, Random access memory, Power demand, Arrays, Sorting
- Klassifikation (DDC)
- 570
- 620
- Herausgeber (Institution)
- IEEE - Institute of Electrical and Electronics Engineers, New York, NY
- Förder- / Projektangaben
- European Commission (EC)
H2020 | RIA
A SYnaptically connected brain-silicon Neural Closed-loop Hybrid system
(SYNCH)
ID: 824162 - Freistaat Sachsen GEPARD
- Freistaat Sachsen LOTUS
- Sonstige beteiligte Institution
- TU Dresden, Dresden
- Version / Begutachtungsstatus
- angenommene Version / Postprint / Autorenversion
- URN Qucosa
- urn:nbn:de:bsz:14-qucosa2-899190
- Veröffentlichungsdatum Qucosa
- 21.02.2024
- Dokumenttyp
- Artikel
- Sprache des Dokumentes
- Englisch
- Lizenz / Rechtehinweis
