- AutorIn
- Evelyn T. Breyer Nanoelectronic Materials Laboratory GmbH, Dresden
- Halid MulaosmanovicNanoelectronic Materials Laboratory GmbH, Dresden
- Jens TrommerNanoelectronic Materials Laboratory GmbH, Dresden
- Thomas Melde
- Stefan Dünkel
- Martin Trentzsch
- Sven Beyer
- Thomas Mikolajick
- Stefan Slesazeck
- Titel
- Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory
- Zitierfähige Url:
- https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-797244
- Konferenz
- 49th European Solid-State Device Research Conference (ESSDERC). Cracow, 23.-26.09.2019
- Quellenangabe
- ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC)
; Proceedings
Erscheinungsort: New York, NY
Verlag: Institute of Electrical and Electronics Engineers incorporated (IEEE)
Erscheinungsjahr: 2019
Seiten: 118-121 - Erstveröffentlichung
- 2019
- Abstract (EN)
- Ferroelectric field-effect transistors (FeFET) based on hafnium oxide offer great opportunities for Logic-in-Memory applications, due to their natural ability to combine logic (transistor) and memory (ferroelectric material), their low-power operation, and CMOS compatible integration. Besides aggressive scaling, dense integration of FeFETs is necessary to make electronic circuits more area-efficient. This paper investigates the impact of ultra-dense co-integration of a FeFET and an n-type selector FET, sharing the same active area, arranged in a 2TNOR memory array. The examined FeFETs exhibit a very similar switching behavior as FeFETs arranged in a standard AND-type array, indicating that the ultra-dense co-integration does not degrade the FeFET performance, and thus, paves the path to a very fine-grained, ultra-dense Logic-in-Memory implementation. Based on this densely integrated 2TNOR array we propose a very compact design of a 4-to-1 multiplexer with a build-in look-up table, thus directly merging logic and memory.
- Andere Ausgabe
- Link zum Artikel, der zuerst in der IEEE Xplore Digital Library erschienen ist:
DOI: 10.1109/ESSDERC.2019.8901735 - Freie Schlagwörter (DE)
- Aufteilung der aktiven Fläche, ferroelektrischer FET (FeFET), Hafniumoxid, Look-up-Table (LUT), Logic-in-Memory (LiM), Multiplexer (MUX), ultra-dichte Integration
- Freie Schlagwörter (EN)
- active area sharing, ferroelectric FET (FeFET), hafnium oxide, look-up table (LUT), Logic-in-Memory (LiM), multiplexer (MUX), ultra-dense integration
- Klassifikation (DDC)
- 621
- Verlag
- IEEE, New York, NY
- Förder- / Projektangaben
- Europäische Union (EU)
Horizon 2020 research and innovation program
Energy Efficient Embedded Non-volatile Memory Logic based on Ferroelectric Hf(Zr)O2
(3eFERRO)
ID: 780302 - Bundesministerium für Wirtschaft (BMWI)
Important Project of Common European Interest
(IPCEI) - Version / Begutachtungsstatus
- angenommene Version / Postprint / Autorenversion
- URN Qucosa
- urn:nbn:de:bsz:14-qucosa2-797244
- Veröffentlichungsdatum Qucosa
- 23.06.2022
- Dokumenttyp
- Konferenzbeitrag
- Sprache des Dokumentes
- Englisch
- Lizenz / Rechtehinweis